1. Field of the Invention
The present invention relates to static random access memory (hereinafter called “SRAM”) equipped with a complementary field-effect transistor.
2. Background Art
One of high-speed, power-thrifty semiconductor memory devices is SRAM formed from a complementary metal-oxide-semiconductor field-effect transistor (hereinafter abbreviated as CMOS). The CMOS has a field-effect transistor of electronic conduction type and a field-effect transistor of hole conduction type. Each memory cell of the SRAM has two CMOS devices, and a field-effect transistor constituting a transfer gate connected to the respective CMOS devices.
In such a field-effect transistor, when α rays or neutrons have cut across a depletion layer formed between a high-density impurity diffusion layer of a drain region and a substrate well, generated electrons or positive holes are collected into the drain region by means an electric field in the depletion layer and diffusion in the substrate. As a result, a logical state of the SRAM is inverted, thereby causing a software error.
Incidentally, there has already been put forth a proposal for realizing commonality between a conduction-type field-effect transistor and an electron-type field-effect transistor through use of a Schottky junction in order to miniaturize a CMOS (see JP2000-124329(Kokai)).